Is the Electronic Compass the Next Whiz-Bang Feature?

The Latest iPhone certainly adds to the likelihood

With the new generation iPhone 3GS that was just announced Apple is trying to stay ahead of the pack for smartphones. The new feature that captured our eyes is the electronic compass (Also called a magnetometer.)  This is another example of a simple technology being elegantly applied to a software interface. We are interested to see whose device is used to realize the feature.  We will not have to wait long, the phones will be on sale June 19^th, and given past experience, we can expect to see the first teardowns within a few hours.

One of the leaders in this space is MEMSIC, who have been first to market with such a device, and is likely a forerunner to land this socket. At the risk of putting out false promotion for this company, we’ll say first that this commentary is about the interesting technology itself and not specifically about a design win. The target device discussed here is the Electronic Compass Board (ECB) evaluation module from MEMSIC (figure 1), and it contains both their novel thermal accelerometer and an electronic compass.

FIGURE 1: MEMSIC Eval Board

The creation of a MEMS magnet is almost a perfect example of elegant simplicity. Does anyone remember a book called, “101 Things a Boy Can Make” by author Arthur C Horth?  Somewhere, in the middle was a project for building an electromagnet using a screwdriver, some wire, and a battery. Many a young engineer did just such a project, for science class or to get a scout science badge. Well, MEMSIC certainly didn’t build something quite that simple, but its engineers must have has a touch of nostalgia in taking a simple concept to a whole new level to meet the complex demands of hand-held devices.

One of these is the need to have it detect the earth’s magnetic field, regardless of what direction the device is being carried or used, since most consumers would not tolerate an application that forces them to hold the compass perfectly still and level. To achieve this MEMSIC has used three sensor chips, and simply ‘bent’ the circuit board to achieve the 3^rd axis, as seen in figure 2. Pretty impressive, given the package is only 1.2mm thick.

FIGURE 2 - X-Ray of Magnetic Sensor

According to MEMSIC the magnetic sensors are anisotropic magnetoresistive (AMR) sensors.  They feature special resistors made of a permalloy thin film, which during manufacture are exposed to a strong magnetic field to orient the magnetic domains uni-directionally, establishing a magnetization vector.  An external field such as the earth’s makes the magnetization rotate, and this changes the film’s resistance.

The magnetoresistive sensors are arranged within a Wheatstone bridge circuit, so that the change in resistance is detected as a change in differential voltage, so that the strength of the applied magnetic field can be inferred.

A very strong external magnetic field could upset, or flip the polarity of the film, changing the sensor characteristics.  To allow for this a strong restoring magnetic field must be applied.  This is enabled on chip with a magnetically coupled strap.

For more information including die photos for the sensor and ASIC chip, registered readers can download our exploratory report. 

A compass feature combined with inertial sensors promises to improve the dead reckoning capabilities of mobile devices, and reduce the energy drain caused by GPS.  It will be very interesting to see what new apps the iPhone 3GS will have , now that it is enabled with a true eCompass.

For ordering information or any additional details about Chipworks reports and services please contact insidetechnology@chipworks.com

Apple Shuffle Non-DRM Chip Undressed

Contributed by Gary Tomkins

The new iPod shuffle has caused quite the “tempest in a teapot” over the last couple of weeks with the knowledge that the iPod contains no controls in the main body, only in the headphone cable. And standard headphones will not work with the iPod.

First off let me state . . . what a daft idea,  a sure way for most of us to avoid buying one! I say this as someone who loves his Macbook, an owner of four Macs (and a working version of the original Mac-only iPod, and Shuffle). I am probably regarded as a “Mac Fanboy” here at Chipworks. Steve Jobs what were you thinking? I am pretty sure when my current Shuffle dies, it will not be replaced by one of these . . . end of rant.

Anyway, back to the chip – the now infamous 8A83E3 (or 89S3E3 seen in some versions). Early speculation suggested that it was a DRM chip, which clearly would be a very, very bad thing. Fortunately this has been refuted by Apple, and it is just a proprietary control chip. Apparently part of a “made for iPod” licensing program that will incur additional charge to manufacturers wanting to make headphones for the iPod. So, it’s just a bad thing. Obviously some circuitry is required to control the iPod, and if you have no interface with the iPod, it has to be in the cable somewhere.

One long-shot rumour is that the chip actually contains a microphone. As Apple does sell headphones with microphones, it’s just possible that they are using the same device and activating the microphone through software. So I thought I would throw our labs at this part and take a peek at what is inside this chip.

Here is the black “Apple goodness” with the Apple headphones that I would typically throw out, as they don’t fit my ears.

The small board with the actual headphone wires passing through the controller.

Our chip is not the 8A83E3 or 89S3E3 that has been posted elsewhere; ours is the 8CT3E3. So we have an 8xx3E3. The 8xx is likely a date code or wafer identifier.

The packaging is actually pretty unusual. It is a chip-scale bare die assembly, where the die has an RDL (metal redistribution layer) and solder balls directly flip chipped to the board. The die marking is a laser marking on the back of the silicon die.

Here is the die “undressed.”

It’s a small, 1.35 mm x 0.85 mm, die made by Texas Instruments with die markings of CDPS3271C.

The die markings clarify the part number, which is actually a typical TI date code. The 8x represents the year and month, and the next four characters are the lot code. Therefore, our three parts were made in September ’08 (89), October ’08 (8A), and December ’08 (8C).

Taking a peek at it down the microscope, it looks like it is fabricated with a three metal BiCMOS process, likely 0.25 µm or 0.18 µm. There is not really a lot of circuitry on the die, but then again how much is really needed to relay the button commands to the processor chip – just the volume controller and the interface for the capacitative sensors on the back of the board.

So no DRM, no microphone; just a high volume design win for Texas Instruments.

CMOS Image Sensors in Camera Phones – Trending Towards a Commodity?

Contributed by Ray Fontaine, Process Analyst

The Image Sensors World blog’s anonymous author, who dutifully tracks the news of the image sensor community, has created a forum for readers to share their observations of current events. Recently, a few interesting comments have appeared regarding commoditization in the high volume, small pixel, consumer imaging space. Since Chipworks purchases several camera phones on a quarterly basis, it seems like a good idea to share some design win information we’ve gathered. Table 1 is a selection of camera phones added to our inventory within the last year or so. I withheld specifics since this information is typically something our clients hold privileged (contact us for more information). The high level design win data for the primary image sensor is listed for each. Note that this is neither an exhaustive list of camera phone manufacturers, nor is it a comprehensive list of the cameras in our database. This is a snapshot from which a few observations can be made.

Table 1: Selected Camera Phone Primary Image Sensor Design Wins (downstream model details withheld)

The obvious interpretation of this list is that there doesn’t seem to be any loyalty from phone makers to the image sensor groups within their own company. This is not unusual, as product managers have a mandate to source parts that are the best fit to their cost/performance/delivery requirements. Still it is interesting to see Samsung, for example, source imagers from their competition.

A new trend (for Chipworks) is finding identical model numbers of camera phones in which the image sensors have been sourced from two vendors. This is represented by the model numbers in bold, corresponding to RIM and Samsung having sourced their CMOS imagers from OmniVision/STMicroelectronics and Micron/Sony, respectively. The frequency of such behavior is difficult to gauge, as we usually only purchase one or two of a particular phone (unless we find something interesting and need more for full RE analysis). Perhaps by chance, these two instances have happened within the last month.  Two data points does not a trend make, but we expect to see more of this in the future. 

The design win story becomes even more interesting when vertically integrated phone company A (whom have a CIS catalog) source their primary camera from competitor B, and their secondary camera from yet another competitor! Arguably the secondary camera market is already commoditized, as witnessed by the problems the formerly dominant OmniVision is having in that market. It remains to be seen if Toshiba’s use of TSVs will give them an edge in that market space.

Is there a trend towards commoditization for imagers in camera phones? The answer is likely different depending on where the phone is positioned in the stratified camera phone market. For the average phone, the answer seems to be trending towards yes. Once the image sensor specifications are met, the phone manufacturers are happy to pit vendors against each other on pricing. Do consumers care? To some extent they do. And in writing this blog, I’ve found a nice camera phone comparison site at cnet. The question is which of the two possible image sensors was in that Samsung “Model A” phone they tested? : )

Since When Does a Resistor Become a Diode?

 Contributed by Jefferson Chua, Circuit Analysis Engineer

We have grown used to great fanfare about the material composition in the tiniest feature of a transistor design, but circuit designers often become jaded about the very innovation that they are designing. They are so entrenched in the details that they never get to see the big picture. "Ho hum, another polysilicon resistor."

But occasionally, even we get surprised.  In this case, a resistor that is actually a diode. Everybody on our circuit RE team was perplexed about this component because planar investigation clearly showed that it was a resistor, yet circuit analysis-wise, it should have been a diode. The circuit just did not make sense.

The TT3040AS chip, found on the Sonion TC100Z21A silicon condenser was analyzed. One of the blocks analyzed was the device’s VPP pump.

The VPP pump circuit is suppose to be classified as a typical Dickson-type charge pump Yet, no diodes were present in the circuit.

To uncover what was really happening required a SEM cross section of every component in the VPP pump. Usually, we only need cross sectioning to determine material composition for delayering purposes, not for circuit extraction – so this was a little new to us. The first component analyzed was the capacitor. The capacitors were found to be really capacitors, and are classified as PIP caps (polysilicon-insulator-polysilicon).

The next component on the hot seat was the suspected “resistors,” having an area of five squares. From the cross section shown below, we confirmed our suspicions that the component we had initially identified as a polysilicon resistor is actually a polysilicon wire doped with P⁺ on the left side and N⁺ doped on the right side, forming an N-P diode.

So there you have it. The lesson is that when normal evidence shows unwaveringly something doesn’t quite make sense, you need to dig a little deeper. The people over at (CSI Miami/Bones/Dexter/choose your favorite crime show) would be proud.

Speed vs leakage in the TSMC 40 nm process - Looking forward to the latest in advanced CMOS technology

contributed by Dick James

Last May, Altera launched their new Stratix IV FPGA family, fabricated in TSMC’s 40 nm process; in December they announced the first product shipments. TSMC had initially offered a 45 nm process, but last year they confirmed that they would go straight into a 10% shrink, and make the 40 nm platform their main production technology.

To quote their 40/45 nm brochure, “TSMC's 40 nm General Purpose (40G, also known as 45GS) process is positioned as a full-node technology, although using half-node design rules, with IP ecosystem support. It provides 2.35 times the standard cell raw gate density of the 65 nm process. TSMC's 40 nm Low Power process (40LP) is also supported with a comprehensive IP infrastructure.” The SRAM cell size is claimed as 0.24 µm², which will make it the smallest that we have ever seen – the Panasonic and Intel 45 nm cell sizes were 0.38 and 0.34 µm², respectively.

Chipworks has obtained some of the latest 40 nm Stratix IV parts, and will be analyzing them to see what TSMC’s 40 nm product looks like. 

What can we expect? It has become clear that Intel is likely to be the only company to use high-k/metal gate at the 45 nm node, so we expect a conventional gate dielectric (almost certainly nitrided), and at best in the 1.2 – 1.5 nm thickness range. The TSMC brochure claims a triple gate oxide option, so to keep leakage at a minimum, it is likely that the thinnest dielectric will only be used for the most critical transistors, maybe 5% of the total count, even with the highest performance product.

However, according to the FPGA Journal, “Altera claims to have compromised on speed at the transistor level in order to reduce leakage. These compromises include increasing Vt, increasing channel lengths, thickening gate oxide, and decreasing Vcc. Next, they worked to gain back enough of that speed via other means to assure that Stratix IV is still faster than its predecessor (65 nm Stratix III). Altera says the net result is that Stratix IV has an average of 30% lower total power consumption compared with similar designs on Stratix III.”

So our Altera transistors may not use the thinnest gate dielectric (t_ox) or the shortest gate length – perhaps a 45 nm gate length and ~2 nm t_ox, as used in the TSMC 55 nm half-node AMD/ATI chip that we analyzed last year. 

However, there are other ways of increasing transistor performance – we have seen limited use of strain techniques from TSMC so far, especially on PMOS devices, so we are likely to see something new there.

TSMC presented a 45-nm process at IEDM 2007[1], with possibly a few clues – dual stress liners with both tensile and compressive contact etch-stop layers are reported.  NMOS is further enhanced by stress memorization, and PMOS by embedded SiGe and the use of (110) orientation wafers.

The other factor in chip speed these days is the metal dielectric stack, perhaps a more important determinant than transistor speed. TSMC’s 40/45 nm processes are claimed to use extreme low-k dielectric material (Black Diamond II?) in the first seven metal layers of an 11 metal stack. 

If that is the case, this will only be the second part that we have seen with second generation low-k. The other was a Via Nano, fabbed by Fujitsu in their 65-nm process, using their Nano-Clustering Silica technology.

Chipworks will be performing both a structural analysis and transistor characterization on the Altera Stratix IV in the next few weeks – stay tuned!

[1]           K-L. Cheng et al., A Highly Scaled, High Performance 45nm Bulk Logic CMOS Technology with 0.242 μm2 SRAM Cell, Proc. IEDM 2007, pp. 243 - 246

Canon's Shifting Approach to Compact Camera Sensors

Contributed by Ray Fontaine

It is not front page news to say that CCDs continue to be replaced by integrated system-on-chip (iSoC) CMOS image sensors (CIS) in consumer applications. However, the global market share is still large for CCD imagers, and they have resisted being replaced by CMOS imagers in certain applications.

According to iSuppli's market share numbers in 2007, CISs held their lead, with CCDs a relatively close second. The iSuppli numbers include all imaging devices, so the CCD market share is buoyed by high volume commercial applications such as copiers, scanners, and medical equipment. Interestingly enough, while the 2007 image sensor market experienced respectable growth, CCDs enjoyed a higher growth rate than the CIS market. 

Typically, the imagers that we analyze are targeted at high volume consumer electronic devices. In this market space, there is a clear view of the CCD vs CIS market share, provided you factor in the application. Camera phone and DSLR companies abandoned CCDs some time ago in favor of CMOS imaging chips, with their superior performance and ability to add logic and memory functionality to the die.

One application where CCDs have thrived, even in recent times, is in digital still cameras (DSC). In fact, if you go to your local electronics store to buy a DSC, you might be more likely to bring home a CCD than a CIS. The tide may finally be turning though, as discussed in a recent Tech-On! article [1]. Canon announced the start of production of a 1.7 µm pixel size CIS to be mounted in their PowerShot SX1 IS camera [2]. Canon, who have traditionally used only CCDs for their DSCs, are positioning this new PowerShot camera in the "high-end" DSC market. The article also suggests that Canon is "highly likely" to use in-house CIS for almost all of their DSCs. This reasoning is linked to consumer demand for full HD video and high-speed burst shooting in a DSC. Canon have long been in the CIS game, having made CIS sensors for their own DSLRs and video cameras. So perhaps it is natural for them to want to source their point and shoot sensors internally.

We've just completed a process analysis [3] of the CIS from the SX1 IS camera and found some truly innovative features. Figure 1 shows the image sensor assembly from the SX1 IS, including the LC1090A imager mounted to a copper frame, and a Texas Instruments/Burr Brown VSP7700 front end image processor. This assembly is connected to the camera main board, which is home to a package-on-package (PoP) assembly shown in Figure 2. 

Figure 1 – Image Sensor Assembly from SX1 IS

Figure 2 shows the top chip of the PoP, an Elpida part which itself is a multichip package (MCP) containing one Elpida die and one STMicroelectronics die. A Canon Digic 4 processor is flip-chip mounted to a fiberglass board beneath the Elpida package. With all of this horsepower, the SX1 IS is poised to make a big splash in the cross-over compact camera space.

Figure 2 – Elpida HB0030A16C and Canon Digic 4 Package-on-Package (PoP)

The LC1090 CIS represents a fundamental shift by Canon in its approach to wafer fabrication. This is the first time we have seen them use a copper back end of line (BEOL) process in an imager. They haven't used light pipes, but instead added process steps to clear the line sealants from the optical path. Compared to previously analyzed Canon image sensors, their pixel design can safely be called revolutionary. The signal routing metal has been fully optimized for optical symmetry, and borderless contacts are used as part of a space saving layout. For us process types, the biggest story has to be the use of Dow Chemical's SiLK low-k dielectric in the BEOL.

Figure 3 shows a low magnification TEM view of the pixel BEOL. The use of SiLK marks the first implementation of a true low-k dielectric in the BEOL of an image sensor (based on Chipworks' analyses). The low-k resin is likely first generation SiLK D or SiLK J, as opposed to Dow's next generation porous SiLK. First generation SiLK has a reported k-value of 2.6 [4]. Note that the line sealant dielectric has been cleared over the photocathodes.

Figure 3 – TEM Cross Section of Canon LC1090 Pixels

Figure 4 shows a TEM of a Lattice Semiconductor FPGA fabbed by Fujitsu. This part, analyzed in 2005, was the first part we found that used SiLK [5]. Upon checking the Lattice Semi report for comparison, we noticed that the copper metal part of the BEOL was identical to our Canon part. So, this part might be fabricated in one of Canon's newest fabs. But, we also consider whether Fujitsu was involved in fabricating the Canon image sensor. A hybrid fabrication process is used for the Canon LC1090. The FEOL is typical of Canon 0.25 µm generation processing. The BEOL is consistent with a 0.13 µm process on 200 mm wafers. 

Well of course this is just speculation, but it is possible that Canon processed the wafers up to the transistors, and shipped them to Fujitsu to perform the copper processing. We've seen conventional CMOS fabs behave in this way; Texas Instruments built one of their 65 nm parts up to the transistor level, and shipped it off to TSMC to finish the BEOL. If this were true with the Canon part, they likely finished the wafer processing themselves with the final aluminum and passivation, and the addition of the color filter and microlens arrays. An early analysis of the Digic 4 processor indicates that it was fabricated by Fujitsu in their 65 nm process, so perhaps Fujitsu has partnered with Canon to help them come up to speed with their copper CIS process. Let me repeat the part about this being speculation!

The Digic 4 process is in itself a story, since it is the first production process we've seen that uses second generation low-k dielectric material! We have also seen this in the Via Nano low-power microprocessor, also fabbed by Fujitsu.

Figure 4 – Fujitsu 130 nm SiLK Low-k Dielectric Process

Getting back to the LC1090 CIS, according to the Tech-On! article [1], Canon have typically sourced their DSC imagers from others, including Sony. So, does this signal a changing of the guard for compact cameras in general? Mobile, small form factor applications led the way in CIS migration, and that was soon followed by DSLRs and video cameras. It begs the question: for how many more years will we find CCDs living in our gadgets?

References

[1] http://techon.nikkeibp.co.jp/english/NEWS_EN/20080919/158225/ 

[2] http://www.dpreview.com/reviews/specs/Canon/canon_sx1is.asp

[3] "Canon LC1090A 10.0 Mp, 1.7 µm Pixel Size CMOS Image Sensor Featuring SiLK Low-k Dielectric," Chipworks report, IPR-0811-801 

[4] http://www.dow.com/silk/lit/ 

[5] "Lattice Semiconductor LFEC1E FPGA Fujitsu SiLK Process Review," Chipworks report, SAR-0510-801