The Day of Reckoning

Last week I took the rash step of publishing what we expected to see in the iPhone, so this week is when we find out how right or wrong we were. Overall, I don’t think we did too badly – see the table below:

We haven’t tracked down most of the modular parts such as the camera lens or PCBs, mostly because they are either un-marked, or the markings on them are obscure, to say the least.

When it comes to the chips, though, we did fairly well. All of the major ICs such the baseband processor, the image sensor, and NAND flash memory were what we expected, and the surprises are in areas such as the amount of power management silicon and the use of a Peregrine SoS (silicon-on-sapphire) RF- switch IC.

Another discovery was the separate nature of the touch screen and the LCD – for some reason I had assumed that they would be integrated into one unit. Of course that means an applications processor for the touchscreen, and more silicon for the LCD. National got the design win for that at both ends (board and glass), using the low-power, low-noise Mobile Pixel Link interface. For more details, see this article on the Video/Imaging Design Line website.

One of the hyped advantages of the iPhone is its battery life, so it’s not surprising that we have three dedicated power management chips in there, as well as the National devices.

I had forgotten about the firmware memory earlier, usually stored in NOR flash, but Apple multi-sources commodity chips such as those, so Intel and SST are not a surprise either. And it appears that the “confident body language” from Wolfson management reported earlier in the year was justified.

The position sensor as expected is a MEMS device, from STMicroelectronics. The LIS302D is a 3-axis - ±2g/±8g smart digital output accelerometer, with the discrete MEMS sensor co-packaged with a separate CMOS interface chip. And of course we happened to look at an LIS302D a few months ago.

STMicroelectronics Accelerometer from iPhone (left), and Chipworks in-house. (Click to enlarge)

Taking the lid off the MEMS chip shows what appears to be an x-y sensor on the right, and a z-axis sensor on the left.

Inside the LIS302D MEMS (Click to enlarge)

We had thought that the sensor may have been the same as the one used in the Nintendo Wii, since the part numbers are similar (LIS302D vs LIS3L02AE), and they are all 3-axis accelerometers but taking the lids off reveals noticeable differences. Maybe we’ll discuss those in another blog!

Getting back to the Peregrine part, theirs is a typical Silicon Valley story. They were founded in 1990, as a spin-off from the US Navy NELC lab, to commercialise their patented UTSi (Ultra-thin silicon) CMOS technology (originating from Hewlett Packard), targeted on the high-frequency RF and radiation-hard IC business.

Things ticked over quietly for some years, slowly growing the business as CMOS moved into the rad-hard area. In 2000 they bought the old (1987) Quality Semiconductor fab in Sydney, Australia, which had been acquired by IDT in 1999. This was a 6”, 0.25-µm fab, and by then 6” sapphire substrates were available, so a good opportunity to go to commercial scale.

In the meantime, of course the need for low-leakage RF IC products has grown exponentially, if not hyperbolically, and it would seem that Peregrine has hit the sweet spot with the mobile/cellphone market. They have signed a volume foundry agreement with Oki semiconductor in Japan, and recently announced record production volumes. Their products have appeared in a number of phones in the last few years, and now they’ve got a socket in the most hyped phone ever.

As it happens, we looked at a Peregrine UltraCMOS™ PE4268 switch a couple of years ago, and the UTSi process is one of those interesting niche processes that we come across once in a while. The technology at 0.5 and 0.25 µm is not high-end in lithography terms, but growing decent quality silicon 90 – 100 nm thick is.

The SoS layer is not perfect single crystal, but large-grain polycrystalline, and thermally treated to reduce the defects caused by the crystalline mismatch with the substrate. If you look closely at the transistor cross-section, you can see the occasional defect, but overall it’s pretty decent quality.

TEM Cross-Section of SoS Transistor (Click to enlarge)

TEM diffraction analysis of the epi-silicon on the sapphire shows that it is conventionally oriented, with a <100> surface, and <110> channel orientation. In the images below, the sapphire substrate is oriented with the <241> direction being into the page, nearly coincident with the Si <110> direction.

TEM Diffraction Images of Sapphire and Silicon Crystalline Structures (Click to enlarge)

So the guys at Peregrine have done a pretty good job on turning some fairly obscure work out of HP in the ‘70s into a leading-edge commercial technology. Good luck to them!