Chipworks' structural and process analysis reports allow you to gain a better understanding of the structure of a competitor’s processes and can be used for technological benchmarking. Choose from a variety of formats lsited below. If you have any questions, we'd be happy to answer them.

Digital Library Functional Analysis

Supporting design engineers, layout designers, and product managers involved in the production of advanced logic devices are two report types that provide in depth analysis of digital libraries. The Digital Library Functional Analysis Report provides statistical benchmarking data about all major logic blocks.

The report includes:

  • High resolution SEM images of layout over the polysilicon and all metal layers using a bevel sample
  • I/O block analog vs. digital
  • Statistical measurements of digital logic implemented in major logic libraries:
  • Primary functional cells P/N ratio
  • Area percentage utilization
  • Gross and actual density
  • Track height
  • Filler cells
  • Power connections
  • Optional add-ons:
  • Full die memory measurements
  • Standard cell utilization of full logic block

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DRAM Process Report

Understanding the process technology in a DRAM device requires a specialized focus on features relevant to their manufacture. The DRAM Process Review delivers that analysis by providing an overview of the general structure and by focusing on the capacitors and logic between the memory blocks.

These reports contain the following detailed information:

  • Introduction and major findings
  • SEM and TEM analysis of the general structure
  • Memory cell cross-sectional TEM analysis
  • Memory cell planar TEM analysis
  • Plan view analysis of the memory logic, such as sense amplifiers and word line drivers
  • Dopant analysis (optional)

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Flash Process Report

The Flash Process Review report provides an understanding of a layout of memory cells in the latest flash technologies. This report is a TEM-based analysis focusing on a device’s flash memory cell, and the array peripheral circuitry.

Report contents include the following detailed information:

  • Package photographs, package X-ray, die photographs, and selected die features photographs
  • SEM cross-sectional and planar analysis of the NAND cell
  • TEM cross-sectional and planar analysis of the NAND cell
  • Results of TEM-EDS and EELS analysis of the materials
  • TEM and SEM cross-sectional analysis of the logic between the memory blocks
  • Essential critical dimensions

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Imager Sensor Process Review

This report also provides a thorough cross-sectional analysis of the general logic and pixel to help understand how the sensor is fabricated. The focus is on the elements specific to image sensors such as microlenses, color filters, pixel architecture, and photocathode. Analysis of the pixel is parallel and perpendicular to the column outline, to show the structure of the pixel array elements. Detailed images focus on the aperture, transistor gate structure, anti-reflective coatings, and photocathode.

The cross-sectional analysis includes TEM imaging to highlight the gate oxide thicknesses, transistor gate structure, and back-end processing in the pixel array. SCM and SRP analyses of the doping profiles in the pixel array are included.

And finally, the Imager Process Review includes a schematic of the unit pixels, or shared pixels if applicable. A plan-view analysis shows the pixel layout from the microlens level, through the metal and poly levels, and the silicon surface to show the diffusions.

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MEMS Process Review – Full

Microelectromechanical systems technology has produced an extensive class of semiconductor devices. The unique process technology incorporated into a MEMS device is the focus of Chipworks' detailed MEMS process review. The MEMS structures are investigated in plan view and in cross section; the control ASIC is also covered. 
Report contents include:

  • Control ASIC fundamentals – such as general process SEM images, minimum metal pitch, and gate length
  • MEMS structure – including a detailed process analysis of the bond pads, dielectrics, metallization, via and contacts, transistors and poly, and wells and substrate
  • In-depth examination of the MEMS architecture and electromechanical components such as electrodes, proof mass, control springs, and motion stops

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Process Analysis - Embedded Memory

At the smaller geometries, the ability to effectively scale embedded memory has become a differentiator for foundries and a real R&D challenge. The Process Analysis – Embedded Memory report format provides specific and customized analysis that delivers the highest ROI when looking specifically at these regions on a die. While analysis of the general logic is included, this report format does not provide a full characterization of its lithographic features. 

These reports contain the following detailed information:

  • Annotated die photograph showing embedded memory block(s)
  • Cross-sectional analysis through the eMemory – Flash, SRAM, DRAM, etc.
  • SEM/SCM analysis of all dielecric levels, metal levels, transistors, poly and isolation, wells and substrate of the memory cells
  • TEM of memory cells – when below 100 nm
  • Plan-view images at metal 3 to diffusion
  • Schematic of memory cells
  • Additional analysis may include (optional):
  • Materials analysis
  • TEM of memory (>100 nm generation)

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Process Flow Analysis

Chipworks' process flow analysis is a valuable addition to a standard process analysis. Using images directly from the structural report, plus additional microscopy required for accurate analysis, the sequence is described in point form, with a discussion of the process steps for each mask step. Normally ordered alongside the related process report, it may also be purchased as a stand-alone report. PFA reports are most commonly available on memory devices and image sensors, but are also available for other device types.

Report contents include:

  • Basic device overview
  • Evidenced-based discussion of process mask sequence, beginning at the substrate and taken stepwise through the layers
  • Summary mask count including the minimum critical dimension for each mask

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Structural Analysis - Standard

Full analysis of the latest CMOS technology requires extensive SEM, TEM, and materials analysis combined with an exhaustive literature search and hundreds of hours of engineering time. The Standard Structural Analysis version of the full Structural Analysis Report was created in order to get a more cost-effective report that still delivers the critical information. 

A Structural Analysis - Standard Report focuses on the process technology with SEM and TEM cross-sectional analysis of the process and memory cells. It excludes a detailed analysis of the floorplan and of the DFM and package features.

The report focuses on the smallest observed features, and includes:

  • General structure analysis via SEM and TEM
  • Memory cell analysis in plan view and cross-section via SEM
  • Materials analysis via TEM-EDS

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Transistor Characterization Report

Chipworks offers DC transistor characterization services for CMOS and bipolar transistors and passive components. Our transistor characterization reports (TCR) give clients access to the DC characteristics of commercially available, leading-edge integrated circuits.

Report contents include:

  • Output characteristics
  • Transfer characteristics
  • Body effect
  • Transconductance
  • Punch through
  • Substrate and gate leakage currents

Key device parameters such as on-state and off-state leakage currents, subthreshold swing, linear and saturation threshold voltages, transconductance, punch-through voltage, and body effect factor are provided. We also provide measurements of several minimum gate length devices with varying gate widths, to ensure the robustness of the acquired data.

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View our basic benchmarking report formats

View our die utilization report formats

View our circuit extraction report formats