Design for Manufacturability Analysis
Clients using Chipworks Layout and DFM Analysis are able to reduce the risk of their billion dollar long-term investments, save millions in product and process development costs, and earn millions in new revenue by getting to market faster with better products.
The information required to understand how leading companies are using DFM to overcome performance and yield problems requires specialized tools, techniques, and engineering effort. This is particularly true for the latest advanced geometries.
Chipworks Layout and DFM Analysis gives clients this information in a reverse engineering report and the ICWorks Surveyor software.
Included in the report:
- a layer-by-layer look at the detailed design rules using SEM and TEM microscopes
- an examination of the standard logic and SRAM cells
- an analysis of key dummy features
Included in the ICWorks Surveyor analysis:
- a software browser for navigating a massive image mosaic
- a massive database of SEM bevel images linked together in a single floorplan (database can be up to 10 GB+)
- annotations of the key regions for quick navigation and understanding
The inaugural report is on Intel 32 nm technology from the Core i5 660 Microprocessor
To learn more visit the Chipworks Report Library for DFM Analysis on the Intel 32 nm Device
Intel 32 nm Core i5 660 Microprocessor orthogonal metal lines
Intel 32 nm Core i5 660 Microprocessor in ICWorks Surveyor showing 3 layers