Structural Analysis (Process and Layout Analysis)
Comprehensive structural analysis provide analyses of the process technology and design rules used to fabricate a device. Advanced node reports (typically used for the very smallest new technologies) also include layout and topology analysis to help further client understanding of the die architecture.
Report contents include:
- Packaging overview including a package x-ray
- Annotated die photograph identifying the location of memory blocks, significant components. A photograph of a partially delayered die to reveal the die floor plan may also be included
- Top-down layer-by-layer analysis of the back end processing, presented with SEM and TEM images to support each area of discussion. The overall structure is shown with details of the bond pads, dielectrics, metallization, vias, and contacts. Material identification for these layers include TEM-EDS of the metals and dielectrics, and/or SIMS of the dielectric stack
- Analysis of the front end processing including SEM and TEM images of the poly, transistors, isolation, and substrate doping. SCM imaging and SRP analysis are used to profile the N and P-type regions within the substrate
- Memory cell analysis, if the device is a memory device or has a substantial amount of embedded memory. This includes a schematic of the unit cell, plan-view SEM images of the cell delayered to the metal through substrate levels, and cross-sectioned images parallel to the bitline and wordline
- Layout – detailed SEM and optical plan-view images, at low and high magnification as required, for making device-relevant conclusions. Shows layout under bond pads, dummy metal patterns, standard logic gate count estimate, and more
Additional analysis may include (optional):
- Package overview section that typically includes cross-sectional images of the PWB, die, solder bumps, and solder balls. May also include SEM-based material analysis of the metallization.
Download a sample Structural Analysis Report (47 MB) »