CMOS SRAM Analysis
This Structural Analysis Report gives an overview of SRAM layout in CMOS technology. In the report, plan-view bevel, cross-sectional TEM and cross-sectional SEM images of the minimum SRAM cell are included. Critical dimensions and extraction of the cell schematic are provided to help understand the SRAM cell.
Report contents include the following detailed information:
- Plan-view bevel analysis of minimum SRAM cell, with images of SRAM layout at diffusion, poly, metal 1 and metal 2
- Extraction of SRAM cell schematic (normally 6T)
- Cross-sectional SEM and TEM analysis of SRAM cell, show transistor gate lengths.
Download a sample CMOS SRAM Analysis