We are just wrapping up our analysis of Sony’s latest CIS, the IMX081. This is the first 1.1 µm pixel device commercially available, and is just chock full of interesting features.
Camera module from SE Cyber-shot S006 that contains the IMX081
Built on a 90 nm design rule process, Sony has implemented a new pixel layout and schematic architecture, moving to an eight-shared pixel architecture (1.375T per pixel effective), compared to the two and four-shared pixel architectures that have been common for the last few years in small pixel size sensors. In addition, advanced packaging features are used with both active and passive embedded devices found in the package.
There is a lot of information for our customers’ competitive analysis teams to analyze when they review the report.
What makes the part interesting for us is our finding that, with the 1.1 µm BSI generation, Sony has migrated to using bulk silicon substrates instead of SOI. The previous Sony BSI sensors we have analyzed (the IMX061 and IMX050) have been fabricated using an SOI starting wafer. This is a more costly substrate, but likely an easier process to implement. By having both processes available, we can presume that Sony was able to identify the yield limiting contributions from the bulk polishing process, and fine tune the yield to achieve a high yielding and very cost effective process.
How do we know that Sony has moved to bulk substrate? That is an interesting question, and one where the review of the forensic evidence gives insight into the art of reverse engineering. Indeed, at the start of our analysis, we were unsure if we would be able to identify the use of SOI or bulk substrate starting wafer – it is not as if this is labeled on the die for us. Also, during fabrication over 90% of the starting material is removed for both processes, leaving us looking for circumstantial indicators.
So here is the image (the smoking gun) that provides the evidence that Sony has indeed adopted a bulk Si process.
Bottom (light side) of a deep trench isolation in the IMX081
This is a deep trench that goes through the whole sensor. We are imaging the bottom (light side) of the trench here, with a metal and dielectric film at the interface. What we can see is the material that fills the trench has a seem running down the middle; this seam extends to the very bottom of the trench. Thus, we can infer that to achieve this, the bottom of the trench has been polished back along with the silicon substrate prior to the dielectric and metal depositions. For an SOI process, the trench bottom would align with the oxide interface, thus the seam from the trench fill material would not extend to the bottom.
Overall, this is a rather elegant piece of reverse engineering from the Chipworks analysis team.
