Contributed by Randy Torrance.
For this blog, we are starting a new category of content called “Design Analysis.” This area will be focused on content most useful for design engineers or for patent teams that are interested in chip circuitry. It will ultimately be comprised of both standard articles and vBlogs that walk through some of the circuitry contained in our most recent analyses. First up is a DC-DC converter found in a high volume tablet.
The Texas Instruments TPS62260 is a highly efficient synchronous step-down DC-DC converter, optimized for applications including cell phones, smartphones, PDAs, pocket PCs, WLAN and Bluetooth™ applications, DVB-H tuner applications, portable hard disk drives, and DC-DC micro modules. This device was found in the Apple iPad and iPad 2 (Figure 1).
Figure 1. Texas Instruments TPS2260 (top centre) on Apple iPad PCB
With a wide input voltage range of 2 V to 6 V, the TPS62260 provides up to 600 mA output current from a single Li-ion cell, two and three alkaline batteries, or 3.3 V and 5 V input voltage rails. The TPS62260 operates at a 2.25 MHz switching frequency using PWM, and enters the power save mode operation at light load currents using PFM, to maintain high efficiency over the entire load current range.
The TPS62260 is fabricated using a three metal, double poly, 0.5 µm BCDMOS process, including an interesting single poly EEPROM cell. The die size is 1.45 mm by 0.86 mm (Figure 3). It can be mounted in either a very small 2×2 6 pin SON or a TSOT-23 5 pin package.
Figure 2. Texas Instruments TPS62260 die markings
The TPS62260 step-down converter integrates the high side and low side power switches on-chip. Interestingly, TI has chosen to use an NMOS transistor for the high side switch, rather than the traditional PMOS. Using an NMOS switch improves efficiency and reduces the switch die area due to the higher transconductance of the NMOS transistor. In fact, the NMOS high side switch is actually smaller than the low side switch. However, this architecture requires a charge pump in the gate driver to fully turn on the NMOS high side switch, which adds some complexity and area. Figure 3 shows the TPS62260 die photo at the polysilicon layer, with the high side switch highlighted in white along the top (six multi-finger transistors), and the low side switch highlighted in white along the left (also six multi-finger transistors). It’s clear that quite a bit of area has been saved by using an NMOS high side switch.
Figure 3. Polysilicon die photo showing high side and low side switches
Another interesting feature of the TPS62260 is that it employs a small nonvolatile memory for trimming purposes. The trimming can be performed both on the wafers during manufacturing and after packaging. TI’s novel EEPROM cell contains two floating poly gates, each includes a small tunneling capacitor and a fork-shaped programming capacitor (see Figure 4). When a pair of high voltage write/erase control signals are applied to the two diffusion regions under the two sides of the poly gate, the smaller tunneling regions either attract electrons from the substrate to the floating gate, or repel the trapped electrons from the floating gate, hence a “write” or “erase” is performed. We extracted this circuit and found a compact differential EEPROM cell structure (Figure 5). The high voltage required for programming the EEPROM cells is provided by a high voltage generator where four Pelliconi stage cascade voltage pumps are used. Long channel extended drain transistors (also visible in Figure 4) are used to route the high voltage to the cells. Similar single poly EEPROM cells have been found by Chipworks in other Texas Instruments devices, such as the TPS62601 6 MHz 500 mA synchronous step-down DC-DC converter and the TPS61181 WLED driver.
Figure 4. Differential EEPROM cell and high voltage transistors
Figure 5: Differential EEPROM schematic, with the cell on the left and the high voltage programming path on the right
The full analog Texas Instruments TPS62260 Circuit Analysis Report also presents the following functional blocks of the device:
- Feedback input
- Error amplifier
- Sawtooth generator
- PFM comparator
- PWM comparator
- Reference generator
- Thermal shutdown
- Input circuits
- Power pin ESD
- Trimming circuits
- SW monitors
- Control logic
- Current limitations
- Gate driver
- SW shaping
- SW LPF
And shown in Figure 6 is a top level schematic of the TPS62260.
Figure 6. TI TPS62260 top level circuit schematic shown in the ICWorks Browser. Click image to enlarge.
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