Patent And Technology Partner To The World's Most Successful Companies

Patent And Technology Partner To The World's Most Successful Companies

Patent And Technology Partner To The World's Most Successful Companies

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Layout Analysis – Gate Count

An estimate of the gate count of each digital block on a die. This information helps you understand what blocks their competition has found more efficient ways of implementing.

These reports include the following detailed information:

  • Package photographs
  • Package x-ray
  • Depot (bare die) die photo
  • Die size measurements
  • Identification and size of minimum NAND 2 cell
  • SEM plan-view image of minimum NAND 2 cell layout at poly
  • Average standard cell gate density and total number of gates estimated
  • Annotated metal 1 or poly die photo showing the digital blocks
  • Best effort identification of functionality of digital blocks
  • Estimate of gate count for each digital block

 

pdf Download a sample report (5 MB) »

 

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