Advanced CMOS Technology: 45 nm, 32 nm and beyond
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Process technology in the latest microprocessor, microcontroller, baseband processor, and FPGA markets represents an ecosystem in and of itself. Although the technology applications are different, the IDMs, foundries, equipment manufacturers and materials suppliers designing at the smallest geometries are in a race to deliver faster, lower power CMOS devices. Whether optimizing the first generation 32 nm and 28 nm processes or 2nd and 3rd generation 45 nm and 90 nm devices this report type is used by leading semiconductor companies.
The risk associated with this R&D is in the billions of dollars for individual companies and to mitigate this risk they are continually benchmarking competitive process technology to improve the success of first silicon and for ongoing process optimization.
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Chipworks offers clients an extensive library of evidence-based process analysis reports, spanning forty years of technological innovation and market intelligence with respect to emerging technologies. We draw this knowledge from multiple sources including international conferences, the International Technology Roadmap for Semiconductors (ITRS), and our own expertise in keeping up with advances in low- and high-k dielectrics, strained silicon and other techniques for leading-edge MOS technologies.
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Report Types Typically used by Clients in Process Design
Process Node Assessment: A very basic report type designed to track competitive devices to look for critical new innovation or to do basic device cost analysis.
Structural Analysis Report: Detailed structural process analysis including TEM, SEM, and materials analysis of the device. This report includes minimum observed features, high-level floor plan layout, analysis of memory density and cell size estimates.
Process Review – Advanced CMOS FEOL: A reduced-scope report that provides critical information on the Front End of Line process technology of a device along with a basic characterization of the overall process.
Package Analysis Report: A analysis of the package, including x-ray and cross-sectional imaging, dimensions and materials.
Transistor Characterization Report: Provides physically measured transistor dimensions and electrical characterization of multiple NMOS and PMOS transistors.